{"id":8855,"date":"2026-07-10T08:11:34","date_gmt":"2026-07-10T08:11:34","guid":{"rendered":"https:\/\/lead-pcb.com\/?p=8855"},"modified":"2026-07-10T08:49:42","modified_gmt":"2026-07-10T08:49:42","slug":"gerber-bom-cpl-stackup","status":"publish","type":"post","link":"https:\/\/lead-pcb.com\/es\/blog\/gerber-bom-cpl-stackup","title":{"rendered":"Gerber, BOM, CPL y Stackup: Qu\u00e9 Significa Cada Archivo"},"content":{"rendered":"<p class=\"wp-block-paragraph\">Los archivos Gerber, BOM, CPL y stackup le indican cuatro cosas diferentes a un fabricante de PCB. Los archivos Gerber definen las capas de la placa. La BOM define los componentes. El CPL define la colocaci\u00f3n. El stackup define la construcci\u00f3n de capas, materiales, cobre, espesor diel\u00e9ctrico y supuestos de impedancia.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Muchos retrasos en la cotizaci\u00f3n de PCBA ocurren antes de que comience la producci\u00f3n. \u00bfPor qu\u00e9? La f\u00e1brica puede tener los datos de la placa, pero no los datos de los componentes. O puede tener una BOM, pero ning\u00fan archivo de colocaci\u00f3n. A veces, los archivos Gerber, BOM y CPL se exportaron desde diferentes revisiones de dise\u00f1o.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Para una lista de verificaci\u00f3n RFQ m\u00e1s amplia, consulte nuestra <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>. Este art\u00edculo explica qu\u00e9 significa cada archivo y c\u00f3mo verificar el paquete antes de enviarlo a un proveedor.<\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p class=\"wp-block-paragraph\"><strong>Puntos clave<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Gerber responde qu\u00e9 fabricar, BOM responde qu\u00e9 comprar, CPL responde d\u00f3nde colocar y stackup responde c\u00f3mo est\u00e1 construida la placa.<\/li>\n\n\n\n<li>La coincidencia de designadores BOM\/CPL y las exportaciones de la misma revisi\u00f3n son las formas m\u00e1s r\u00e1pidas de evitar bucles de aclaraci\u00f3n en RFQ.<\/li>\n<\/ul>\n<\/blockquote>\n\n\n\n<figure aria-labelledby=\"four-file-package-title\" style=\"margin:2rem 0;padding:1rem;border:1px solid #d7dde8;border-radius:12px;background:#ffffff;overflow-x:auto;\">\n<svg role=\"img\" viewbox=\"0 0 960 300\" width=\"100%\" height=\"auto\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\">\n<title id=\"four-file-package-title\">Gerber BOM CPL and stackup file package for PCBA quote review<\/title>\n<rect width=\"960\" height=\"300\" fill=\"#ffffff\"\/>\n<text x=\"34\" y=\"36\" font-family=\"Arial, sans-serif\" font-size=\"21\" font-weight=\"700\" fill=\"#172033\">Cuatro Archivos, Cuatro Preguntas de F\u00e1brica<\/text>\n<text x=\"34\" y=\"62\" font-family=\"Arial, sans-serif\" font-size=\"13\" fill=\"#586273\">Un paquete completo de PCBA conecta los datos de fabricaci\u00f3n, abastecimiento, colocaci\u00f3n y construcci\u00f3n antes de la revisi\u00f3n de la cotizaci\u00f3n.<\/text>\n<defs><marker id=\"fourFileArrow\" viewbox=\"0 0 10 10\" refx=\"8\" refy=\"5\" markerwidth=\"6\" markerheight=\"6\" orient=\"auto-start-reverse\"><path d=\"M0 0L10 5L0 10Z\" fill=\"#7d8798\"\/><\/marker><\/defs>\n<g font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#172033\">\n  <g transform=\"translate(34,105)\"><rect width=\"140\" height=\"86\" rx=\"12\" fill=\"#E8F1FF\" stroke=\"#2F6BFF\" stroke-width=\"2\"\/><text x=\"70\" y=\"30\" text-anchor=\"middle\" font-weight=\"700\">Gerber<\/text><text x=\"70\" y=\"52\" text-anchor=\"middle\">\u00bfQu\u00e9 placa<\/text><text x=\"70\" y=\"68\" text-anchor=\"middle\">fabricar?<\/text><\/g>\n  <g transform=\"translate(214,105)\"><rect width=\"140\" height=\"86\" rx=\"12\" fill=\"#EAF8F0\" stroke=\"#21A67A\" stroke-width=\"2\"\/><text x=\"70\" y=\"30\" text-anchor=\"middle\" font-weight=\"700\">Lista de materiales<\/text><text x=\"70\" y=\"52\" text-anchor=\"middle\">\u00bfQu\u00e9 piezas<\/text><text x=\"70\" y=\"68\" text-anchor=\"middle\">comprar?<\/text><\/g>\n  <g transform=\"translate(394,105)\"><rect width=\"140\" height=\"86\" rx=\"12\" fill=\"#FFF4E5\" stroke=\"#E28A00\" stroke-width=\"2\"\/><text x=\"70\" y=\"30\" text-anchor=\"middle\" font-weight=\"700\">CPL<\/text><text x=\"70\" y=\"52\" text-anchor=\"middle\">\u00bfD\u00f3nde<\/text><text x=\"70\" y=\"68\" text-anchor=\"middle\">colocar las piezas?<\/text><\/g>\n  <g transform=\"translate(574,105)\"><rect width=\"140\" height=\"86\" rx=\"12\" fill=\"#F2ECFF\" stroke=\"#8157D9\" stroke-width=\"2\"\/><text x=\"70\" y=\"30\" text-anchor=\"middle\" font-weight=\"700\">Apilamiento<\/text><text x=\"70\" y=\"52\" text-anchor=\"middle\">\u00bfC\u00f3mo est\u00e1<\/text><text x=\"70\" y=\"68\" text-anchor=\"middle\">construida la PCB?<\/text><\/g>\n  <g transform=\"translate(772,95)\"><rect width=\"142\" height=\"106\" rx=\"14\" fill=\"#172033\"\/><text x=\"71\" y=\"42\" text-anchor=\"middle\" fill=\"#ffffff\" font-weight=\"700\">Cotizaci\u00f3n de PCBA<\/text><text x=\"71\" y=\"64\" text-anchor=\"middle\" fill=\"#ffffff\">Ingenier\u00eda<\/text><text x=\"71\" y=\"82\" text-anchor=\"middle\" fill=\"#ffffff\">Revisi\u00f3n<\/text><\/g>\n<\/g>\n<g stroke=\"#7d8798\" stroke-width=\"2\" marker-end=\"url(#fourFileArrow)\"><line x1=\"176\" y1=\"148\" x2=\"210\" y2=\"148\"\/><line x1=\"356\" y1=\"148\" x2=\"390\" y2=\"148\"\/><line x1=\"536\" y1=\"148\" x2=\"570\" y2=\"148\"\/><line x1=\"716\" y1=\"148\" x2=\"766\" y2=\"148\"\/><\/g>\n<text x=\"34\" y=\"250\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">Vista de tabla: Gerber = fabricaci\u00f3n, BOM = abastecimiento, CPL = colocaci\u00f3n, stackup = construcci\u00f3n de capas\/material.<\/text>\n<\/svg>\n<figcaption>Figura 1: La forma m\u00e1s \u00fatil de entender los archivos Gerber, BOM, CPL y stackup es mediante la pregunta de f\u00e1brica que cada archivo responde.<\/figcaption>\n<\/figure>\n\n\n\n<h2 class=\"wp-block-heading\">\u00bfQu\u00e9 Son los Archivos Gerber, BOM, CPL y Stackup?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">IPC publica estudios de referencia de ensamblaje electr\u00f3nico que cubren rendimientos, tasas de defectos, DPMO, retrabajo\/desecho, devoluciones de clientes, rendimiento de proveedores y m\u00e9todos de inspecci\u00f3n\/prueba (<a href=\"https:\/\/www.ipc.org\/news-release\/ipc-releases-quality-benchmark-study-electronics-assembly\">IPC, Estudio de Referencia de Calidad para Ensamblaje Electr\u00f3nico<\/a>). La claridad de los archivos no es trabajo administrativo. Es control de producci\u00f3n.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Los archivos Gerber, BOM, CPL y stackup son el paquete de datos central detr\u00e1s de la mayor\u00eda de las revisiones de cotizaci\u00f3n de PCB y PCBA. No son cuatro nombres para lo mismo. Describen diferentes partes del trabajo.<\/p>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Archivo<\/th><th>Pregunta principal respondida<\/th><th>Utilizado por<\/th><\/tr><\/thead><tbody><tr><td>Gerber + taladro<\/td><td>\u00bfQu\u00e9 PCB debe fabricarse?<\/td><td>Ingenier\u00eda de fabricaci\u00f3n de PCB<\/td><\/tr><tr><td>Lista de materiales<\/td><td>\u00bfQu\u00e9 componentes deben adquirirse y ensamblarse?<\/td><td>Ingenier\u00eda de abastecimiento y PCBA<\/td><\/tr><tr><td>Lista de posici\u00f3n de componentes (CPL) \/ recogida y colocaci\u00f3n<\/td><td>\u00bfD\u00f3nde y c\u00f3mo deben colocarse las piezas?<\/td><td>Programaci\u00f3n SMT y ensamblaje<\/td><\/tr><tr><td>Apilamiento<\/td><td>\u00bfC\u00f3mo est\u00e1n construidas las capas, materiales y cobre?<\/td><td>Revisi\u00f3n de fabricaci\u00f3n e impedancia<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">Piense en el paquete de archivos PCBA como un sistema de cuatro preguntas. Gerber responde qu\u00e9 fabricar. BOM responde qu\u00e9 comprar. CPL responde d\u00f3nde colocar. Stackup responde c\u00f3mo est\u00e1 construida la placa. Si falta una respuesta, el proveedor tiene que adivinar o detenerse y preguntar.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Un paquete completo tambi\u00e9n necesita alineaci\u00f3n de revisi\u00f3n. Los archivos Gerber, BOM, CPL y stackup deben describir la misma versi\u00f3n de la placa. Si no lo hacen, la cotizaci\u00f3n puede basarse en los componentes incorrectos, el recuento de huellas, el grosor de la placa o el alcance de la prueba.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Los datos de Gerber, BOM, CPL y stackup deben describir una revisi\u00f3n de la placa antes de que se coticen los supuestos de fabricaci\u00f3n, abastecimiento, colocaci\u00f3n y construcci\u00f3n. Los lanzamientos de referencia de calidad IPC cubren resultados de ensamblaje como rendimientos, defectos, DPMO, retrabajo, devoluciones, rendimiento de proveedores y m\u00e9todos de inspecci\u00f3n, que dependen de entradas de fabricaci\u00f3n claras.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Para una lista de verificaci\u00f3n RFQ m\u00e1s detallada, use nuestra <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Archivos Gerber en la Fabricaci\u00f3n de PCB<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">En las gu\u00edas actuales de procesos de ensamblaje de PCB, la revisi\u00f3n de archivos o pedidos aparece antes de la impresi\u00f3n de pasta de soldadura, la colocaci\u00f3n de componentes, el reflujo y la inspecci\u00f3n. Los archivos Gerber son los datos de fabricaci\u00f3n de la placa que se revisan en ese primer paso.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Los archivos Gerber describen las capas f\u00edsicas de la PCB. Generalmente incluyen capas de cobre, m\u00e1scara de soldadura, serigraf\u00eda, pasta, contorno de la placa y capas mec\u00e1nicas. Los archivos de taladro est\u00e1n estrechamente relacionados, pero son separados. Definen agujeros metalizados, agujeros no metalizados, v\u00edas y ranuras.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Gerber no le dice al ensamblador qu\u00e9 componentes exactos comprar. Tampoco le indica de manera confiable a la l\u00ednea SMT c\u00f3mo debe colocarse cada pieza. Esa informaci\u00f3n proviene de la BOM y el CPL.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Capas Gerber comunes y qu\u00e9 controlan<\/h3>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Elemento Gerber o de taladro<\/th><th>Lo que controla<\/th><th>Error com\u00fan<\/th><\/tr><\/thead><tbody><tr><td>Capas de cobre<\/td><td>Trazas, pads, planos<\/td><td>Capa interna faltante o revisi\u00f3n incorrecta<\/td><\/tr><tr><td>M\u00e1scara de soldadura<\/td><td>Aperturas de m\u00e1scara y cobre protegido<\/td><td>Desajuste de apertura de m\u00e1scara alrededor de pads de paso fino<\/td><\/tr><tr><td>Serigraf\u00eda<\/td><td>Designadores, marcas de polaridad, logotipos<\/td><td>Marca de polaridad oculta o inconsistente<\/td><\/tr><tr><td>Capa de pasta<\/td><td>Referencia de apertura de stencil<\/td><td>Capa de pasta faltante para pads SMT<\/td><\/tr><tr><td>Esquema de la tabla<\/td><td>Forma, recortes, ranuras<\/td><td>Contorno exportado en una capa mec\u00e1nica poco clara<\/td><\/tr><tr><td>Archivo de perforaci\u00f3n<\/td><td>Agujeros y v\u00edas<\/td><td>Archivo de perforaci\u00f3n faltante o que no coincide con la revisi\u00f3n de Gerber<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">Las exportaciones Gerber X2 y RS-274X son formatos comunes. Para la mayor\u00eda de los compradores, el nombre del formato importa menos que la integridad. \u00bfPuede el fabricante identificar cada capa, contorno de placa, agujero, caracter\u00edstica superficial y revisi\u00f3n? Si es as\u00ed, la revisi\u00f3n comienza bien.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">La revisi\u00f3n de archivos o pedidos viene antes de la producci\u00f3n SMT en los flujos de trabajo comunes de ensamblaje de PCB. Esa revisi\u00f3n depende de datos completos de Gerber y perforaci\u00f3n porque la informaci\u00f3n de cobre, m\u00e1scara, serigraf\u00eda, pasta, contorno de placa y agujeros define la PCB desnuda antes de que comience el ensamblaje.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Vea c\u00f3mo la revisi\u00f3n de archivos encaja en el <a href=\"\/es\/blog\/printed-circuit-board-assembly-process\/\">proceso de ensamblaje de placas de circuito impreso<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">\u00bfQu\u00e9 es una BOM en el Ensamblaje de PCB?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">El lanzamiento de referencia de ensamblaje electr\u00f3nico de IPC de 2022 enumera m\u00e9tricas como rendimientos, tasas de defectos, DPMO, retrabajo\/desperdicio, devoluciones de clientes, rendimiento de proveedores y m\u00e9todos de inspecci\u00f3n\/prueba (<a href=\"https:\/\/www.ipc.org\/news-release\/ipc-releases-quality-benchmark-study-electronics-assembly\">IPC, Estudio de Referencia de Calidad para Ensamblaje Electr\u00f3nico<\/a>). Una BOM afecta varios de esos riesgos porque controla qu\u00e9 piezas entran en la fabricaci\u00f3n.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Una BOM, o lista de materiales, es la lista de componentes para el ensamblaje. Le dice al proveedor de PCBA qu\u00e9 resistencias, capacitores, CI, conectores, m\u00f3dulos y art\u00edculos mec\u00e1nicos obtener y poblar.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Una BOM limpia incluye designadores de referencia, cantidades, nombres de fabricante, MPN, paquetes, valores, descripciones y estado DNP\/DNI. Las mejores BOM tambi\u00e9n incluyen alternativas aprobadas, notas de ciclo de vida, tolerancia, clasificaciones de voltaje y proveedores preferidos.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Campos m\u00ednimos de BOM para una cotizaci\u00f3n de PCBA limpia<\/h3>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Campo de BOM<\/th><th>Ejemplo<\/th><th>Por qu\u00e9 es importante<\/th><\/tr><\/thead><tbody><tr><td>Designador de referencia<\/td><td>R1, C5, U2, J1<\/td><td>Conecta la pieza con el esquem\u00e1tico y el CPL<\/td><\/tr><tr><td>Cantidad<\/td><td>12<\/td><td>Apoya la verificaci\u00f3n de abastecimiento y recuento de ensamblaje<\/td><\/tr><tr><td>Fabricante<\/td><td>Texas Instruments<\/td><td>Reduce la ambig\u00fcedad<\/td><\/tr><tr><td>MPN<\/td><td>N\u00famero de pieza exacto<\/td><td>Controla el abastecimiento, el costo y las alternativas<\/td><\/tr><tr><td>Paquete \/ huella<\/td><td>0603, QFN-32, SOIC-8<\/td><td>Ayuda a comparar BOM y datos de colocaci\u00f3n<\/td><\/tr><tr><td>Valor \/ clasificaci\u00f3n<\/td><td>10 k\u03a9, 16 V, 1%<\/td><td>Previene sustituciones gen\u00e9ricas incorrectas<\/td><\/tr><tr><td>DNP \/ DNI<\/td><td>No poblar<\/td><td>Evita que se ensamblen piezas opcionales<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">Las revisiones de ingenier\u00eda de PCB de LEADHUI avanzan m\u00e1s r\u00e1pido cuando la BOM utiliza MPN exactos y marcas DNP claras. Una l\u00ednea que dice \u201cresistencia de 10k\u201d puede ser suficiente para una discusi\u00f3n de prototipo, pero no es suficiente para un abastecimiento controlado.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Las alternativas aprobadas tambi\u00e9n ayudan. Si un MPN no est\u00e1 disponible, el proveedor puede cotizar un sustituto aprobado en lugar de detener la RFQ. La clave es el control. Las alternativas deben ser aprobadas por ingenier\u00eda, no elegidas a ciegas.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">La calidad de la BOM afecta los controles de producci\u00f3n porque los MPN ambiguos, el estado DNP faltante y las alternativas no controladas pueden cambiar qu\u00e9 piezas se obtienen y ensamblan. Los lanzamientos de referencia de IPC rastrean medidas de calidad como rendimientos, defectos, DPMO, retrabajo, devoluciones, rendimiento de proveedores y m\u00e9todos de inspecci\u00f3n\/prueba.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Si est\u00e1 preparando una fabricaci\u00f3n llave en mano, compare su BOM con la m\u00e1s amplia <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">\u00bfQu\u00e9 es un Archivo CPL en el Ensamblaje de PCB?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">Las gu\u00edas de ensamblaje actuales describen la colocaci\u00f3n como un paso SMT central entre la impresi\u00f3n de pasta de soldadura y el reflujo (<a href=\"https:\/\/jlcpcb.com\/blog\/printed-circuit-board-assembly\">JLCPCB, Gu\u00eda de Ensamblaje de Placa de Circuito Impreso<\/a>; <a href=\"https:\/\/www.pcbassemblyexpress.com\/pcb-assembly-process\">PCB Assembly Express, Proceso de Ensamblaje de PCB<\/a>). Un archivo CPL suministra los datos de colocaci\u00f3n detr\u00e1s de ese paso.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Un archivo CPL es una lista de colocaci\u00f3n de componentes. Tambi\u00e9n puede llamarse archivo de pick-and-place, archivo de centroide, archivo XY o archivo de colocaci\u00f3n. Le dice a la programaci\u00f3n SMT d\u00f3nde se sienta cada componente en la placa.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Los campos t\u00edpicos de CPL incluyen designador, coordenada X, coordenada Y, rotaci\u00f3n, lado de la placa y paquete. El designador es el puente entre la BOM y el CPL. Si la BOM dice U3 y el CPL dice U4 para la misma pieza, alguien tiene que resolver el conflicto.<\/p>\n\n\n\n<figure aria-labelledby=\"bom-cpl-match-title\" style=\"margin:2rem 0;padding:1rem;border:1px solid #d7dde8;border-radius:12px;background:#ffffff;overflow-x:auto;\">\n<svg role=\"img\" viewbox=\"0 0 900 280\" width=\"100%\" height=\"auto\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\">\n<title id=\"bom-cpl-match-title\">BOM and CPL designator matching in PCB assembly<\/title>\n<rect width=\"900\" height=\"280\" fill=\"#ffffff\"\/>\n<text x=\"30\" y=\"34\" font-family=\"Arial, sans-serif\" font-size=\"20\" font-weight=\"700\" fill=\"#172033\">Coincidencia de BOM + CPL<\/text>\n<text x=\"30\" y=\"58\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">El designador de referencia conecta qu\u00e9 comprar con d\u00f3nde colocarlo.<\/text>\n<defs><marker id=\"matchArrow\" viewbox=\"0 0 10 10\" refx=\"8\" refy=\"5\" markerwidth=\"6\" markerheight=\"6\" orient=\"auto-start-reverse\"><path d=\"M0 0L10 5L0 10Z\" fill=\"#7d8798\"\/><\/marker><\/defs>\n<g font-family=\"Arial, sans-serif\" font-size=\"13\">\n  <rect x=\"40\" y=\"90\" width=\"300\" height=\"140\" rx=\"12\" fill=\"#EAF8F0\" stroke=\"#21A67A\" stroke-width=\"2\"\/>\n  <text x=\"190\" y=\"116\" text-anchor=\"middle\" font-weight=\"700\" fill=\"#172033\">BOM: what to buy<\/text>\n  <text x=\"70\" y=\"150\" fill=\"#172033\">U3<\/text><text x=\"125\" y=\"150\" fill=\"#586273\">MCU, QFN-32<\/text>\n  <text x=\"70\" y=\"178\" fill=\"#172033\">C8<\/text><text x=\"125\" y=\"178\" fill=\"#586273\">10 \u00b5F capacitor<\/text>\n  <text x=\"70\" y=\"206\" fill=\"#172033\">D1<\/text><text x=\"125\" y=\"206\" fill=\"#586273\">LED, green<\/text>\n  <rect x=\"560\" y=\"90\" width=\"300\" height=\"140\" rx=\"12\" fill=\"#FFF4E5\" stroke=\"#E28A00\" stroke-width=\"2\"\/>\n  <text x=\"710\" y=\"116\" text-anchor=\"middle\" font-weight=\"700\" fill=\"#172033\">CPL: where to place<\/text>\n  <text x=\"590\" y=\"150\" fill=\"#172033\">U3<\/text><text x=\"645\" y=\"150\" fill=\"#586273\">X 42.10 Y 18.20 Rot 90\u00b0<\/text>\n  <text x=\"590\" y=\"178\" fill=\"#172033\">C8<\/text><text x=\"645\" y=\"178\" fill=\"#586273\">X 51.30 Y 22.40 Rot 0\u00b0<\/text>\n  <text x=\"590\" y=\"206\" fill=\"#172033\">D1<\/text><text x=\"645\" y=\"206\" fill=\"#586273\">X 62.00 Y 16.50 Rot 180\u00b0<\/text>\n<\/g>\n<g stroke=\"#7d8798\" stroke-width=\"2\" marker-end=\"url(#matchArrow)\"><line x1=\"350\" y1=\"146\" x2=\"550\" y2=\"146\"\/><line x1=\"350\" y1=\"174\" x2=\"550\" y2=\"174\"\/><line x1=\"350\" y1=\"202\" x2=\"550\" y2=\"202\"\/><\/g>\n<text x=\"30\" y=\"258\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">Table view: U3, C8, and D1 must appear consistently in both files so sourcing and SMT placement describe the same assembly.<\/text>\n<\/svg>\n<figcaption>Figure 2: BOM\/CPL matching depends on reference designators. The BOM identifies the part; the CPL places it.<\/figcaption>\n<\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">Why rotation and polarity review matters<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Rotation conventions can vary between CAD exports and SMT programming. That does not mean CPL rotation is useless. It means the assembler should verify rotation-sensitive parts before production.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Check LEDs, diodes, IC pin 1, electrolytic capacitors, connectors, modules, and asymmetric packages. Silkscreen markings and assembly drawings help resolve unclear orientation. Would you rather catch that in review, or after reflow?<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">A CPL, centroid, XY, or pick-and-place file supports SMT setup by listing each component&#8217;s designator, X\/Y location, rotation, side, and package. That placement data lets the SMT program be checked against the BOM and assembly drawing before build.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">For quote preparation, include the CPL with the files listed in the <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">PCB Stackup Requirements for PCBA Quotes<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">IPC-2221 describes generic PCB design principles, including material, mechanical, and electrical design considerations (<a href=\"https:\/\/shop.ipc.org\/ipc-2221\">IPC, IPC-2221<\/a>). Stackup belongs to that bare-board construction discipline because layer order, dielectric thickness, copper, material, and impedance assumptions affect fabrication review.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">A PCB stackup defines the physical layer construction of the board. It lists layer order, copper thickness, dielectric thickness, core and prepreg structure, material, Tg, finished thickness, and controlled-impedance targets where needed.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Simple 2-layer prototypes may use a manufacturer\u2019s standard stackup. But multilayer, high-speed, RF, high-current, HDI, or controlled-impedance boards need clearer stackup data. Otherwise, the fabricator must infer construction details that affect cost and performance.<\/p>\n\n\n\n<figure aria-labelledby=\"stackup-title\" style=\"margin:2rem 0;padding:1rem;border:1px solid #d7dde8;border-radius:12px;background:#ffffff;overflow-x:auto;\">\n<svg role=\"img\" viewbox=\"0 0 760 360\" width=\"100%\" height=\"auto\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\">\n<title id=\"stackup-title\">Example four layer PCB stackup cross section<\/title>\n<rect width=\"760\" height=\"360\" fill=\"#ffffff\"\/>\n<text x=\"30\" y=\"34\" font-family=\"Arial, sans-serif\" font-size=\"20\" font-weight=\"700\" fill=\"#172033\">Example 4-Layer PCB Stackup<\/text>\n<text x=\"30\" y=\"58\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">Copper and dielectric order affects thickness, impedance, cost, and manufacturing review.<\/text>\n<g font-family=\"Arial, sans-serif\" font-size=\"13\" fill=\"#172033\">\n  <rect x=\"90\" y=\"100\" width=\"420\" height=\"28\" rx=\"4\" fill=\"#E28A00\"\/><text x=\"530\" y=\"120\">L1 copper: signal<\/text>\n  <rect x=\"90\" y=\"132\" width=\"420\" height=\"46\" rx=\"4\" fill=\"#E8F1FF\"\/><text x=\"530\" y=\"160\">Prepreg dielectric<\/text>\n  <rect x=\"90\" y=\"182\" width=\"420\" height=\"28\" rx=\"4\" fill=\"#21A67A\"\/><text x=\"530\" y=\"202\">L2 copper: ground<\/text>\n  <rect x=\"90\" y=\"214\" width=\"420\" height=\"52\" rx=\"4\" fill=\"#F2ECFF\"\/><text x=\"530\" y=\"244\">Core dielectric<\/text>\n  <rect x=\"90\" y=\"270\" width=\"420\" height=\"28\" rx=\"4\" fill=\"#21A67A\"\/><text x=\"530\" y=\"290\">L3 copper: power<\/text>\n  <rect x=\"90\" y=\"302\" width=\"420\" height=\"34\" rx=\"4\" fill=\"#E8F1FF\"\/><text x=\"530\" y=\"324\">Prepreg + L4 signal below<\/text>\n<\/g>\n<text x=\"30\" y=\"348\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">Table view: stackup records layer order, copper, dielectric, material, and impedance assumptions.<\/text>\n<\/svg>\n<figcaption>Figure 3: A stackup defines the physical construction of the PCB, not the component list.<\/figcaption>\n<\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">When stackup is usually required<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Send stackup data for 4-layer and higher PCBs, controlled-impedance designs, high-speed digital boards, RF boards, antenna designs, high-current boards, and production builds that must be repeatable. Include target impedance, material, copper weight, layer order, and finished thickness.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">When stackup may be less critical<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">For simple 2-layer prototypes, a supplier\u2019s standard material and thickness may be acceptable. Still, state any constraints. If board thickness, copper weight, finish, material, or impedance matters, don&#8217;t assume the supplier knows.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Stackup data defines layer order, dielectric thickness, copper, material, finished thickness, and impedance assumptions before the PCB is fabricated and assembled. IPC-2221 covers generic PCB design principles, so stackup details should be treated as design-control data, not as an optional note for complex boards.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">If stackup is part of the quote scope, include it alongside the files in the <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">How Do These Files Work Together in a PCBA Quote?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">IPC&#8217;s quality benchmark releases track 7 categories of assembly performance data, including yields, defect rates, DPMO, rework\/scrap, returns, supplier performance, and inspection\/test methods (<a href=\"https:\/\/www.ipc.org\/news-release\/ipc-releases-quality-benchmark-study-electronics-assembly\">IPC, Estudio de Referencia de Calidad para Ensamblaje Electr\u00f3nico<\/a>). A quote should define the inputs that affect those outcomes.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The files work together when they describe the same board revision and the same manufacturing scope. Gerber and drill files support PCB fabrication. BOM supports component sourcing. CPL supports SMT placement. Stackup supports construction review. Assembly drawings and test plans close the loop.<\/p>\n\n\n\n<figure aria-labelledby=\"file-workflow-title\" style=\"margin:2rem 0;padding:1rem;border:1px solid #d7dde8;border-radius:12px;background:#ffffff;overflow-x:auto;\">\n<svg role=\"img\" viewbox=\"0 0 980 230\" width=\"100%\" height=\"auto\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\">\n<title id=\"file-workflow-title\">PCBA file package workflow from review to testing<\/title>\n<rect width=\"980\" height=\"230\" fill=\"#ffffff\"\/>\n<text x=\"30\" y=\"34\" font-family=\"Arial, sans-serif\" font-size=\"20\" font-weight=\"700\" fill=\"#172033\">File-to-Factory Workflow<\/text>\n<defs><marker id=\"workflowArrow\" viewbox=\"0 0 10 10\" refx=\"8\" refy=\"5\" markerwidth=\"6\" markerheight=\"6\" orient=\"auto-start-reverse\"><path d=\"M0 0L10 5L0 10Z\" fill=\"#7d8798\"\/><\/marker><\/defs>\n<g font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#172033\">\n  <g transform=\"translate(30,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#E8F1FF\" stroke=\"#2F6BFF\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\">Ingenier\u00eda<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\">Revisi\u00f3n<\/text><\/g>\n  <g transform=\"translate(180,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#F2ECFF\" stroke=\"#8157D9\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\">Fabricaci\u00f3n<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\">+ Stackup<\/text><\/g>\n  <g transform=\"translate(330,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#EAF8F0\" stroke=\"#21A67A\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\">Abastecimiento<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\">Lista de materiales<\/text><\/g>\n  <g transform=\"translate(480,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#FFF4E5\" stroke=\"#E28A00\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\">SMT<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\">CPL<\/text><\/g>\n  <g transform=\"translate(630,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#E8F1FF\" stroke=\"#2F6BFF\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\">Inspecci\u00f3n<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\">AOI \/ X-ray<\/text><\/g>\n  <g transform=\"translate(780,80)\"><rect width=\"120\" height=\"70\" rx=\"10\" fill=\"#172033\"\/><text x=\"60\" y=\"28\" text-anchor=\"middle\" font-weight=\"700\" fill=\"#ffffff\">Test<\/text><text x=\"60\" y=\"48\" text-anchor=\"middle\" fill=\"#ffffff\">Acceptance<\/text><\/g>\n<\/g>\n<g stroke=\"#7d8798\" stroke-width=\"2\" marker-end=\"url(#workflowArrow)\"><line x1=\"154\" y1=\"115\" x2=\"176\" y2=\"115\"\/><line x1=\"304\" y1=\"115\" x2=\"326\" y2=\"115\"\/><line x1=\"454\" y1=\"115\" x2=\"476\" y2=\"115\"\/><line x1=\"604\" y1=\"115\" x2=\"626\" y2=\"115\"\/><line x1=\"754\" y1=\"115\" x2=\"776\" y2=\"115\"\/><\/g>\n<text x=\"30\" y=\"196\" font-family=\"Arial, sans-serif\" font-size=\"12\" fill=\"#586273\">Table view: file review checks revision alignment before fabrication, sourcing, SMT placement, inspection, and test acceptance.<\/text>\n<\/svg>\n<figcaption>Figure 4: A supplier uses the file package across engineering review, fabrication, sourcing, SMT programming, inspection, and testing.<\/figcaption>\n<\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">One missing file can change the quote. Missing CPL data can make SMT setup unclear. Missing stackup data can affect PCB cost and impedance review. Missing test requirements can make two suppliers quote different scopes.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Quantity, lead time, surface finish, panelization, programming, coating, packaging, and compliance requirements can also affect pricing. The more clearly you define the scope, the easier it is to compare quotes fairly.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">A complete PCBA file package should define the manufacturing inputs that affect assembly outcomes before the supplier prices the build. IPC quality benchmark releases cover 7 performance areas, including yields, defects, DPMO, rework\/scrap, returns, supplier performance, and inspection\/test methods.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">For a full-service view, see how files move through <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Additional PCBA Package Files to Send<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">The EU RoHS Directive restricts hazardous substances in electrical and electronic equipment, while REACH governs chemical registration, evaluation, authorization, and restriction in the EU (<a href=\"https:\/\/environment.ec.europa.eu\/topics\/waste-and-recycling\/rohs-directive_en\">European Commission, RoHS Directive<\/a>; <a href=\"https:\/\/echa.europa.eu\/regulations\/reach\/understanding-reach\">ECHA, Understanding REACH<\/a>). Compliance needs should be part of the package when they apply.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Gerber, BOM, CPL, and stackup are central files, but they are not always enough. A practical PCBA package may also need drill files, assembly drawings, fabrication drawings, test requirements, programming files, labels, packaging notes, and compliance requirements.<\/p>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Archivo o requisito<\/th><th>When to include it<\/th><th>Por qu\u00e9 es importante<\/th><\/tr><\/thead><tbody><tr><td>Archivos de perforaci\u00f3n<\/td><td>Always with Gerber<\/td><td>Defines holes, vias, and slots<\/td><\/tr><tr><td>Dibujo de ensamblaje<\/td><td>SMT or mixed assembly<\/td><td>Clarifies polarity, pin 1, DNP, connectors<\/td><\/tr><tr><td>Fabrication drawing<\/td><td>Controlled build<\/td><td>Defines tolerances, finish, material, notes<\/td><\/tr><tr><td>Test plan<\/td><td>Tested PCBA<\/td><td>Defines AOI, X-ray, ICT, functional test<\/td><\/tr><tr><td>Programming file<\/td><td>Firmware-loaded boards<\/td><td>Controls MCU or module programming<\/td><\/tr><tr><td>Compliance notes<\/td><td>Regulated markets<\/td><td>Defines RoHS, REACH, UL, or customer requirements<\/td><\/tr><tr><td>Packaging notes<\/td><td>Production delivery<\/td><td>Controls labels, trays, ESD bags, cartons<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">A minimum RFQ package may be enough for a rough quote. A production-ready package should be more complete. Do you need serialized labels, conformal coating, functional testing, or firmware loading? Say so before the supplier quotes.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">RoHS restricts hazardous substances in electrical and electronic equipment in the EU, while REACH governs chemical registration and restrictions. When those requirements apply, they belong in the PCBA file package beside Gerber, BOM, CPL, stackup, drawings, test plans, programming notes, and packaging instructions.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Testing scope also affects quote accuracy; start with the <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a> if you need a minimum package.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">What File Mismatches Should You Check Before Sending an RFQ?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">IPC&#8217;s 2019 quality benchmark release included electronics assembly data categories such as yields, defect rates, DPMO, rework\/scrap, returns, supplier performance, and inspection\/test methods (<a href=\"https:\/\/www.ipc.org\/news-release\/ipc-releases-2019-quality-benchmark-study-electronics-assembly\">IPC, 2019 Quality Benchmark Study for Electronics Assembly<\/a>). Pre-RFQ checks help prevent avoidable causes of rework and clarification.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The most important checks are revision alignment, BOM\/CPL designator matching, CPL rotation, polarity notes, stackup completeness, and defined test requirements. These checks are simple, but they catch many quote problems.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">LEADHUI PCB engineering teams usually review RFQs faster when Gerber, BOM, and CPL are exported from the same CAD release. The files don&#8217;t need to be fancy. They need to agree.<\/p>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>File mismatch<\/th><th>Consequence<\/th><th>Fix before sending<\/th><\/tr><\/thead><tbody><tr><td>Gerber revision differs from BOM<\/td><td>Wrong footprint or part count<\/td><td>Export all files from the same release<\/td><\/tr><tr><td>BOM designator missing from CPL<\/td><td>Part may be sourced but not placed<\/td><td>Sort both files by designator<\/td><\/tr><tr><td>CPL has bottom-side parts missing<\/td><td>SMT program may be incomplete<\/td><td>Check top\/bottom side column<\/td><\/tr><tr><td>Rotation or polarity unclear<\/td><td>LEDs, ICs, diodes may be oriented wrong<\/td><td>Add assembly drawing and pin-1 notes<\/td><\/tr><tr><td>MPNs are generic or obsolete<\/td><td>Sourcing delay or wrong substitution<\/td><td>Add exact MPNs and approved alternates<\/td><\/tr><tr><td>Stackup missing for multilayer PCB<\/td><td>Cost or impedance assumptions unclear<\/td><td>Add layer order, material, copper, thickness<\/td><\/tr><tr><td>Test requirements undefined<\/td><td>Suppliers quote different scopes<\/td><td>Attach acceptance criteria and test notes<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">Fast pre-send checklist<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Before sending an RFQ, export Gerber, BOM, and CPL from the same CAD release. Confirm revision names and dates match. Sort BOM and CPL by designator. Check top and bottom side placement. Verify pin 1 and polarity-sensitive parts.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Then include stackup for multilayer or impedance-sensitive boards. Attach test requirements and production notes. If you\u2019re unsure, ask the supplier to review the package before final pricing.<\/p>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p class=\"wp-block-paragraph\">Not sure whether your BOM and CPL match? Send LEADHUI PCB your Gerber, BOM, CPL, stackup, quantity, and test requirements for engineering review before assembly.<\/p>\n<\/blockquote>\n\n\n\n<p class=\"wp-block-paragraph\">Pre-RFQ checks for revision alignment, BOM\/CPL matching, polarity, stackup, and test scope reduce avoidable clarification before production. IPC&#8217;s 2019 quality benchmark release tracked 7 assembly quality categories, including yields, defects, DPMO, rework, returns, supplier performance, and inspection\/test methods.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">These checks help suppliers quote the same scope; they also connect to the broader <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a> workflow.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Preguntas frecuentes<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\">What is the difference between Gerber and BOM?<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Gerber files define PCB fabrication layers such as copper, mask, silkscreen, paste, and outline. The BOM defines the components to source and assemble. IPC benchmark releases track assembly quality categories such as yields, defects, DPMO, rework, returns, supplier performance, and inspection\/test methods, so both board data and part data matter.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">What is the difference between BOM and CPL?<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">A BOM identifies parts, while a CPL places parts. Current SMT process guides list pick-and-place as a core assembly step, and CPL data supports that step. The reference designator links the 2 files: the BOM says what U3 is; the CPL says where U3 goes.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Do I need stackup for a PCBA quote?<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">You need stackup data when layer construction affects price, performance, or repeatability. IPC names 2 major assembly references, IPC-A-610 and J-STD-001, but stackup handles the PCB construction side. Send it for multilayer, controlled-impedance, RF, high-speed, high-current, or production-critical boards.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Can a manufacturer quote without a CPL file?<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Sometimes a rough quote is possible without CPL, especially for simple boards. But pick-and-place is a standard SMT step in assembly guides, and accurate setup needs placement data. Without CPL, the supplier may need to estimate placement work or request more files.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">What files should I check before sending a PCB assembly RFQ?<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Check at least 7 inputs: Gerber, drill, BOM, CPL, stackup when needed, assembly drawing, and test requirements. Also confirm quantity, lead time, revision names, polarity notes, DNP markings, approved alternates, and compliance needs such as RoHS or REACH when applicable.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">For the shortest RFQ path, start with the <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a> and then review the <a href=\"\/es\/blog\/printed-circuit-board-assembly-process\/\">proceso de ensamblaje de placas de circuito impreso<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Conclusi\u00f3n<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">Gerber, BOM, CPL, and stackup files each answer a different factory question. Gerber defines the PCB. BOM defines the parts. CPL defines placement. Stackup defines construction.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">A clean PCBA quote package does more than upload files. It aligns revisions, connects BOM and CPL designators, clarifies polarity, defines stackup needs, and states test scope. That gives the supplier fewer assumptions to make.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Send LEADHUI PCB your Gerber, BOM, CPL, stackup, quantity, and test requirements for a practical engineering review and accurate PCBA quote.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Next, compare how these files support <a href=\"\/es\/blog\/pcba-quote-files\/\">Lista de verificaci\u00f3n de archivos de cotizaci\u00f3n de PCBA<\/a> from fabrication through testing.<\/p>","protected":false},"excerpt":{"rendered":"<p>Gerber, BOM, CPL, and stackup files tell a PCB manufacturer four different things. Gerber files define the board layers. The BOM defines components. The CPL defines placement. The stackup defines layer construction, materials, copper, dielectric thickness, and impedance assumptions. Many PCBA quote delays happen before production starts. Why? The factory may have board data, but [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_seopress_titles_title":"","_seopress_titles_desc":"","_seopress_robots_index":"","_seopress_robots_follow":"","_seopress_robots_imageindex":"","_seopress_robots_snippet":"","_seopress_robots_primary_cat":"","_seopress_robots_breadcrumbs":"","_seopress_robots_freeze_modified_date":"","_seopress_robots_custom_modified_date":"","_seopress_robots_canonical":"","_seopress_social_fb_title":"","_seopress_social_fb_desc":"","_seopress_social_fb_img":"","_seopress_social_fb_img_attachment_id":0,"_seopress_social_fb_img_width":0,"_seopress_social_fb_img_height":0,"_seopress_social_twitter_title":"","_seopress_social_twitter_desc":"","_seopress_social_twitter_img":"","_seopress_social_twitter_img_attachment_id":0,"_seopress_social_twitter_img_width":0,"_seopress_social_twitter_img_height":0,"_seopress_redirections_value":"","_seopress_redirections_enabled":"","_seopress_redirections_enabled_regex":"","_seopress_redirections_logged_status":"","_seopress_redirections_param":"","_seopress_redirections_type":0,"_seopress_analysis_target_kw":"","_seopress_news_disabled":"","_seopress_video_disabled":"","_seopress_video":[],"_seopress_pro_schemas_manual":[],"_seopress_pro_rich_snippets_disable_all":"","_seopress_pro_rich_snippets_disable":[],"_seopress_pro_schemas":[],"footnotes":""},"categories":[6],"tags":[],"class_list":["post-8855","post","type-post","status-publish","format-standard","hentry","category-pcb-assembly"],"acf":[],"meta_box":[],"_links":{"self":[{"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/posts\/8855","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/comments?post=8855"}],"version-history":[{"count":0,"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/posts\/8855\/revisions"}],"wp:attachment":[{"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/media?parent=8855"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/categories?post=8855"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/lead-pcb.com\/es\/wp-json\/wp\/v2\/tags?post=8855"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}