High-Precision HDI PCB Manufacturing and Assembly
Support 1-N-1, 2-N-2, and Any-layer ELIC processes. The minimum line width/line spacing is 1.5 mil, facilitating the perfect implementation of highly integrated devices.Get Instant HDI Quote
HDI PCB Types We Manufacture
1-Stage HDI
The most cost-effective rigid configuration featuring a single copper routing layer bonded to a standard fiberglass-epoxy core. Optimized for simple circuit layouts.
2-Stage HDI
Engineered for mid-density circuits. Features dual-sided copper routing layers interconnected via precision Plated Through-Holes (PTH), allowing components to be populated on both sides.
Any-Layer ELIC
High-density 3D interconnect architectures with alternating copper and prepreg layers. Delivers stable power distribution (planes) and precise impedance control for complex digital circuits.
What Is an HDI PCB?
An HDI PCB (High Density Interconnect Printed Circuit Board) is a specialized, high-performance circuit board designed to pack more circuitry into a much smaller footprint than conventional PCBs.
A board is classified as an HDI PCB when it incorporates these four ultra-fine features:
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Microvias: Laser-drilled holes with a diameter $\le$ 150 µm (6 mils) that drastically save routing space compared to mechanical drilling.
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Blind & Buried Vias:
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Blind Vias: Connect an outer layer to inner layers without penetrating the entire board.
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Buried Vias: Connect internal layers only, completely hidden from the outside.
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Fine Line & Space: Traces and gaps shrunk to 75 µm (3 mils) or lower for incredibly high-density routing.
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Sequential Build-Up (SBU): Layers are stacked, drilled, and plated one by one, rather than pressing all layers together at once.
HDI PCB Manufacturing Process
1.Core Board Fabrication：
The process starts by manufacturing a standard inner-layer core (the “N” layer). This involves cutting the laminate, drilling mechanical through-holes, plating them (PTH), printing the circuit pattern, and checking the inner layers using Automated Optical Inspection (AOI).
2.First Lamination (1st Build-Up)：
Prepreg (insulating material) and copper foil are laminated onto both sides of the core under high temperature and pressure to form the outer layers.
3.First Laser Drilling (L1 to L2)：
An ultraviolet (UV) or CO2 laser drills ultra-precise, tiny microvias (typically ≤150μm) from the new outer layer down to the inner core layer.
4.Electroless Copper & Electroplating：
The laser-drilled microvias are desmeared (cleaned of resin debris), chemically coated with a thin layer of electroless copper, and electroplated. For stacked configurations, the microvias are completely filled with copper (Via-in-Pad plating).
5.Second Lamination & Laser Drilling：
For 2nd-level HDI, another layer of dielectric and copper foil is laminated. A second laser drilling run targets the layers above, creating either staggered vias (offset) or stacked vias (directly over the first copper-filled via).
6.Outer Layer Imaging & Etching：
High-resolution LDI (Laser Direct Imaging) transfers the ultra-fine outer circuit pattern (typically ≤75μm line and space) to the board. The unexposed copper is etched away to finalize the traces.
7.Solder Mask & Surface Finish：
Liquid Photoimageable (LPI) solder mask is applied and cured. High-reliability surface finishes like ENIG (Electroless Nickel Immersion Gold) or ENEPIG are applied to protect the tiny SMT and BGA pads.
HDI PCB DFM Guide
Minimize revision cycles and secure maximum production yields at the early design stage.🎯 Stacked Vias Configuration
- Space Efficiency: Microvias are stacked vertically on top of each other, providing ultimate routing density and space savings for fine-pitch BGAs (≤ 0.4mm pitch).
- Process Requirement: Requires VIPPO (Via-in-Pad Plated Over) technology. The underlying microvias must be completely electroplated, copper-filled, and planarized before stacking the next layer.
- DFM Pitfall Mitigation: Avoid placing unfilled mechanical buried/through holes directly underneath stacked microvias, as this can induce voiding or solder migration during reflow.
🌿 Staggered Vias Configuration
- Cost-Effective Choice: Microvias are offset or staggered horizontally between adjacent layers (a minimum offset of ≥ 0.15mm is highly recommended).
- Process Advantage: Eliminates the rigorous requirement for 100% flat copper filling on every intermediate layer. Shortens the production process flow and improves fabrication yield by 15%-20%, significantly reducing total costs.
- DFM Pitfall Mitigation: Designers must verify microsection overlap clearances and allocate sufficient routing channels around the offset via pads.
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Why choose us?
Ultra-Fine Pitch Processing for Advanced BGAs
Equipped with industry-leading laser drilling and fine-line lithography, we effortlessly support ultra-dense BGAs with a pitch ≤ 0.4mm, minimizing layer counts and optimizing signal integrity.
Versatile Stackup Architectures
From standard 1-N-1 and 2-N-2 structures (stacked or staggered vias) to advanced Any-Layer ELIC, we offer the full spectrum of HDI builds to balance your cost targets and spatial constraints.
Uncompromised Microvia Reliability
Utilizing state-of-the-art Via-in-Pad Plated Over (VIPPO) and copper-filled via technologies, backed by 100% microsection analysis and thermal shock testing to eliminate microvia cracking or delamination.
Proactive DFM Support
Our seasoned HDI engineering team provides complimentary stackup optimization and manufacturability reviews during the CAM stage, ensuring high yields and accelerated time-to-market.
HDI Technical Capabilities
| Process Feature | Standard Capability | Advanced Capability |
|---|---|---|
| 1. Structure & Base Parameters | ||
| Layer Count | 4 - 20 Layers | Up to 40 Layers |
| HDI Stackup Architecture | 1+N+1, 2+N+2, 3+N+3 | Any-Layer ELIC (Every Layer Interconnect) |
| Base Materials | Standard/High Tg FR-4, Halogen-Free | Megtron 6/7, Rogers Series, High-Speed Materials |
| Board Thickness | 0.40 mm – 3.20 mm | 0.15 mm – 6.00 mm |
| 2. Laser & Mechanical Drilling | ||
| Laser Via Size (Diameter) | 4 mil (0.10 mm) | 3 mil (0.075 mm) |
| Laser Via Aspect Ratio | 1:1 | 1.2:1 |
| Mechanical Blind/Buried Via | 8 mil (0.20 mm) | 6 mil (0.15 mm) |
| Via Drilling Accuracy | ±2 mil (±50 μm) | ±1 mil (±25 μm) |
| 3. Fine Circuit & Lithography | ||
| Min. Trace Width / Space | 3 mil / 3 mil (75 μm) | 1.5 mil / 1.5 mil (38 μm) |
| BGA Pitch Compatibility | ≥ 0.40 mm | ≤ 0.35 mm (Fine-pitch routing) |
| Outer Layer Copper Thickness | 1/3 oz – 1 oz | Up to 3 oz |
| Inner Layer Copper Thickness | 1/3 oz – 1 oz | Up to 2 oz |
| 4. Via Processing & Surface Finishes | ||
| Microvia Filling Process | Copper Paste / Electroplated Copper Filling | VIPPO (Via-in-Pad Plated Over) |
| Core Via Plugging | Non-conductive Epoxy Resin Plugging | POFV (Plated Over Filled Via) / Conductive Paste |
| Surface Finishes | ENIG, OSP, HASL-LF | ENEPIG, Immersion Silver, Hard Gold Plating |
| Impedance Control Tolerance | ±10% | ±5% (Advanced Differential Matrix) |
HDI PCB FAQs
What is the difference between 1+N+1, 2+N+2, and Any-Layer ELIC architectures?
These designations refer to the number of sequential lamination cycles and laser-drilled microvia layers. 1+N+1 (1-Step HDI) contains a single layer of laser microvias on both sides of the core. 2+N+2 (2-Step HDI) introduces a second sequential lamination, allowing microvias to be either stacked or staggered. Any-Layer ELIC (Every Layer Interconnect) eliminates the rigid core entirely, allowing microvias to interconnect vertically across any layer, providing the ultimate component routing density.
When should I choose Staggered Vias over Stacked Vias to optimize costs?
If your mechanical footprint allows it, choose Staggered Vias. Stacked vias require strict via-in-pad plating (VIPPO) where the lower via must be 100% copper-filled and completely planarized before the next layer is processed. Staggered vias do not require this absolute flat-filling step on intermediate layers, which simplifies the process flow, boosts fabrication yields by 15%-20%, and lowers overall costs.
What are your standard DFM limits for laser microvia diameter and aspect ratio?
Our standard capability supports a laser via diameter of 4 mil (0.10 mm) with a conservative 1:1 aspect ratio (via depth to via diameter). For advanced high-density designs, we can comfortably achieve a production limit of 3 mil (0.075 mm) with an aspect ratio of up to 1.2:1.
How does your factory prevent microvia cracking and reliability failures?
Microvia reliability depends entirely on precise copper electroplating and strict thermal stress control. We employ 100% automated optical inspection (AOI) alongside regular cross-sectional metallographic analysis to verify copper plating thickness inside the via walls. Furthermore, all advanced batches undergo rigorous thermal shock testing to eliminate the risk of via-to-target-pad separation or delamination under high temperatures.
Do you support fine-pitch BGA routing below 0.40 mm pitch?
Yes. With our advanced lithography and fine-line etching, we support trace width and spacing down to 1.5 mil (38 µm). This allows us to securely route advanced BGA components with a pitch of ≤ 0.35 mm utilizing via-in-pad technologies and minimal trace necking.
How do I obtain a precise stackup and impedance calculation for my project?
Because HDI impedance control relies heavily on base materials and lamination parameters, we provide a complimentary CAM pre-production review. Simply upload your Gerber data or initial layer structure concept, and our engineering team will build a validated, manufacturable stackup matrix using Polar impedance modeling tools within 24 hours.
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